Referring now to FIGS. 1 and 2, a transimpedance amplifier (TIA) circuit is shown and includes an inverting amplifier having a transconductance gm, a load resistance RL, and a feedback resistance Rf. As is known, the TIA circuit converts an input current Iin to an output voltage Vo. Several characteristics of the amplifier circuit in FIG. 1 are described below, including gain, input impedance, output impedance, and noise. The gain of the amplifier circuit:
  Gain  =                    v        o                    i        in              =                  -                  R          f                    +                        1                      g            m                          .            For many implementations, Rf is much larger than
  1      g    m  such that the gain is essentially equal to—Rf.
The input impedance Rin of the amplifier circuit of FIG. 1 is as follows:
      R          i      ⁢                          ⁢      n        =            1              g        m              ⁢          (              1        +                              R            f                                R            L                              )      Thus, the input impedance Rin is a function of the load resistance RL, as well as the feedback resistance Rf and the transconductance gm. The output impedance Ro is equal to
  1      g    m  at low frequency. However, due to parasitic capacitance C1, the output impedance increases to the value of the feedback resistance Rf for frequencies greater than
      1                  R        f            ⁢              C        1              ,as is illustrated generally in FIG. 2.
Assuming the feedback resistance Rf is much greater than
      1          g      m        ,the noise at the input of the amplifier circuit is:
  Noise  =            4      ⁢      KT              g      m      Thus, the noise is independent of the feedback resistance Rf and the load resistance RL, and inversely related to the transconductance gm. Note that K is Boltzmann's constant and T is temperature. Therefore, reducing noise generally involves increasing the transconductance gm.
One advantage of the amplifier circuit of FIG. 1 is that while noise is closely related to the transconductance gm, the input impedance Rin is not. Therefore, noise can be set to a desired level by adjusting the transconductance gm. The desired input impedance Rin can then be obtained by adjusting the feedback and load resistances Rf and RL, respectively. In this sense, the noise and input impedance of the amplifier circuit of FIG. 1 are relatively independent.
In contrast, the input impedance and noise of differential TIAs are both dependent on the transconductance gm. Specifically, the input impedance Rin is equal to
  1      g    m  and the noise is equal to
            4      ⁢      KT              g      m        .Accordingly, adjusting the noise level will affect the input impedance and vice versa in differential TIAs.
Referring now to FIG. 3, it is difficult to obtain high gain from a transimpedance amplifier while maintaining relatively flat input impedance and noise levels at high frequencies. As noted above, to have low noise, the transconductance gm must be relatively large. For most transistors, the transconductance gm is given by the following equation:
      g    m    =                    2        ⁢                                  ⁢        KIW            L      Where W is width, L is length, and I is current. To increase the transconductance gm, the width W of the device and/or the current I can be increased. As can be seen from the following equations, however, the width W is proportional to the parasitic capacitances C1 and C2:C1=CoxWL; andC2∝W.Where Cox is oxide capacitance. Thus, increasing the width W to increase the transconductance gm also increases the parasitic capacitances C1 and C2. The effects of the larger parasitic capacitances on circuit performance (specifically input impedance, gain, and bandwidth) are discussed further below.
Referring now to FIG. 4, the general equation for input impedance is set forth above. However, if the value of capacitance C2 increases, at some frequency it shunts the load resistance RL such that the equation for input impedance becomes:
      R          i      ⁢                          ⁢      n        =            1              g        m              ⁢          (              1        +                                            R              L                        ⁢                          C              2                                                          R              L                        +                          C              2                                          )      FIG. 4 illustrates this relationship. As shown therein, the input impedance is initially flat. As frequency increases, the impedance of capacitor C2 decreases and begins to reduce the impedance of the parallel combination of capacitor C2 and the load resistance RL. This, in turn, increases the input impedance Rin starting at a frequency of about
      1                  C        2            ⁢              R        L              .At even higher frequencies, the input impedance may drop off due to circuit performance, as shown in FIG. 4. Thus, one problem with the amplifier circuit of FIG. 1 is that reducing noise also requires increasing the transconductance gm. Increasing the transconductance gm, in turn, increases the parasitic capacitance and can adversely impact the input impedance Rin at certain frequencies.
Referring now to FIG. 5, to achieve high gain, a high feedback resistance Rf is typically needed. However, the transistor has an output impedance ro and a load impedance RL. Usually RL is much greater than ro. The equation for ro is:
      r    o    =                    T        ·        L                    g        m              .  Where T represents a constant typically having a value of about 100 and L represents the length of the device. Therefore, given a value for
  1      g    m  of 5 ohms and a device length of 0.25 microns, ro will be approximately 125 ohms. Assuming the load impedance RL is infinite, the equation for input impedance Rin is:
      R          i      ⁢                          ⁢      n        =                    1                  g          m                    ⁢      1        +                  (                                            R              f                        ⁡                          (                                                R                  L                                +                                  r                  o                                            )                                                          R              L                        ⁢                          r              o                                      )            .      If an input impedance of 50 ohms is used, the feedback resistance Rf is limited to approximately 1125 ohms.
Increasing the size of the device adversely impacts the input impedance Rin at high frequencies because of the increased capacitance. Increasing the size of the device also limits the value of the load impedance RL. Limiting RL also limits the value of the feedback resistance Rf and adversely impacts the gain at DC.
Referring now to FIG. 6, in order to derive the bandwidth of an amplifier with feedback, an open loop response technique is used to provide information relating to the bandwidth and maximum achievable bandwidth of a circuit. The DC gain of the open loop response is determined by opening the feedback loop and attaching a voltage source to one end of the feedback loop as shown in FIG. 6. The output voltage is sensed at the other end of the feedback loop.
To derive the bandwidth, the DC gain of the open loop response and the first dominant pole P1 are found. Assuming stable operation, there is only one pole P1 that is located below a crossover frequency. The crossover frequency is the product of the DC gain of the open loop response and the first dominant pole P1. The crossover frequency defines the bandwidth of the closed loop amplifier. The maximum available bandwidth is related to the second non-dominant pole P2.
Referring now to FIG. 7, the response of the amplifier circuit of FIG. 6 is shown. The DC gain of the open loop response is gmRL and the circuit has a dominant pole at
      1                  R        f            ⁡              (                              C            1                    +                      C            2                          )              .Multiplying the DC gain of the open loop response with P1 provides a crossover frequency of
                    g        m            ⁢              R        L                            R        f            ⁡              (                              C            1                    +                      C            2                          )              ·Further the circuit arrangement has a non-dominant pole at
      1                  C        L            ⁢              R        2              ,which relates to a barrier frequency or maximum achievable bandwidth. Increasing the transconductance gm increases the parasitic capacitances C1, C2. If the load impedance RL is less than the feedback resistance Rf, then the second component of the equation
  (            i      .      e      .        ,                  ⁢                  R        L                    R        f              )is less than unity. Thus, it should be understood that there is a maximum bandwidth that can be obtained, which is basically
            g      m        C    ,which limits the circuit.